133 lines
5.5 KiB
CSV
133 lines
5.5 KiB
CSV
Number,Name,Type,Description,Note
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1,PWRBTN#,I,"Power button, with integrated pull-up",SIO PANSWH#
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3,RSTBTN#,I,"Reset button, with integrated pull-up",SoC SYS_RESET#
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5,SLS_S0,O,"Power status, output high when S0(Working)",SIO PSON#
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7,SLS_S3,O,"Power status, output high when S0(Working), S3(Sleep)",SoC GPD5
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9,TSENSE,I,NTC temperature sensor input,SIO TMPIN2
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11,GND,,,
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13,HSIO0_TX+,O,"Differential signal output, coupling capacitor required",
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15,HSIO0_TX-,O,"Differential signal output, coupling capacitor required",
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17,GND,,,
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19,HSIO1_TX+,O,"Differential signal output, coupling capacitor required",
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21,HSIO1_TX-,O,"Differential signal output, coupling capacitor required",
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23,GND,,,
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25,HSIO2_TX+,O,"Differential signal output, coupling capacitor required",
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27,HSIO2_TX-,O,"Differential signal output, coupling capacitor required",
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29,GND,,,
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31,HSIO3_TX+,O,"Differential signal output, coupling capacitor required",
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33,HSIO3_TX-,O,"Differential signal output, coupling capacitor required",
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35,GND,,,
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37,HSIO8_TX+,O,"Differential signal output, coupling capacitor required",
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39,HSIO8_TX-,O,"Differential signal output, coupling capacitor required",
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41,GND,,,
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43,HSIO9_TX+,O,"Differential signal output, coupling capacitor required",
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45,HSIO9_TX-,O,"Differential signal output, coupling capacitor required",
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47,GND,,,
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49,HSIO10_TX+,O,"Differential signal output, coupling capacitor required",
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51,HSIO10_TX-,O,"Differential signal output, coupling capacitor required",
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53,GND,,,
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55,HSIO11_TX+,O,"Differential signal output, coupling capacitor required",
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57,HSIO11_TX-,O,"Differential signal output, coupling capacitor required",
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59,GND,,,
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61,HSIO6_TX+,O,"Differential signal output, coupling capacitor required",
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63,HSIO6_TX-,O,"Differential signal output, coupling capacitor required",
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65,GND,,,
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67,USB2_P1-,I/O,USB 2.0 differential signal,
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69,USB2_P1+,I/O,USB 2.0 differential signal,
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71,GND,,,
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73,USB2_P2-,I/O,USB 2.0 differential signal,
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75,USB2_P2+,I/O,USB 2.0 differential signal,
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77,GND,,,
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79,USB2_P3-,I/O,USB 2.0 differential signal,
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81,USB2_P3+,I/O,USB 2.0 differential signal,
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83,GND,,,
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85,REFCLK0+,O,PCIe reference clock,
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87,REFCLK0-,O,PCIe reference clock,
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89,GND,,,
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91,REFCLK1+,O,PCIe reference clock,
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93,REFCLK1-,O,PCIe reference clock,
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95,GND,,,
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97,REFCLK2+,O,PCIe reference clock,
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99,REFCLK2-,O,PCIe reference clock,
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101,GND,,,
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103,WAKE#,I,Wake Mu when pull-down,SoC WAKE#
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105,PLTRST#,O,Platform reset signal,SoC GPP_B13
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107,GND,,,
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109,USB2_P5-,I/O,USB 2.0 differential signal,
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111,USB2_P5+,I/O,USB 2.0 differential signal,
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113,GND,,,
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115,VBAT,,RTC battery input,SoC VCCRTC
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117,PROCHOT#,I,Overheat protect when pull-down,SoC PROCHOT#
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119,GPP_E0,I/O,"GPIO, functions defined by BIOS",
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121,GPP_A12,I/O,"GPIO, functions defined by BIOS",
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123,GPP_B14,I/O,"GPIO, functions defined by BIOS",
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125,GPP_B11,I/O,"GPIO, functions defined by BIOS",
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127,TPM_IRQ,I,discrete TPM interrupt,SoC GPP_B4
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129,USB_OC#,I,USB over current signal,SoC GPP_A16
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131,SUSCLK,O,32.768kHz clock output,SoC GPD8
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133,BIOS_SEL#,I,BIOS select: pull-up: integrated ROM; pull-down: carrier ROM,
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135,GND,,,
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137,UART0_RXD,I,SoC UART0 receiver ,SoC GPP_H10
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139,UART0_TXD,O,SoC UART0 transmitter ,SoC GPP_H11
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141,UART1_RXD,I,SoC UART1 receiver ,SoC GPP_D17
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143,UART1_TXD,O,SoC UART1 transmitter ,SoC GPP_D18
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KEY,KEY,KEY,KEY,
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145,SML1_DATA,I/O,SMLink1 data,SoC GPP_C7
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147,SML1_CLK,O,SMLink1 clock,SoC GPP_C6
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149,SML1_ALERT#,I,SMLink1 alert,SoC GPP_B23
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151,GND,,,
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153,SPI_IO3,I/O,"SPI interface, BIOS and dTPM specific",
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155,SPI_CLK,O,"SPI interface, BIOS and dTPM specific",
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157,SPI_CS2#,O,"SPI chip select, dTPM specific",
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159,SPI_MOSI/SPI_IO0,I/O,"SPI interface, BIOS and dTPM specific",
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161,SPI_IO2,I/O,"SPI interface, BIOS and dTPM specific",
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163,SPI_MISO/SPI_IO1,I/O,"SPI interface, BIOS and dTPM specific",
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165,SPI_CS#,O,"SPI chip select, BIOS ROM specific",
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167,GND,,,
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169,DDIB_DDC_SDA,I/O,DDIB HDMI display data channel data,SoC GPP_H17
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171,DDIB_DDC_SCL,O,DDIB HDMI display data channel clock,SoC GPP_H15
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173,TCP1_DDC_SDA,I/O,TCP1 HDMI display data channel data,SoC GPP_E21
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175,TCP1_DDC_SCL,O,TCP1 HDMI display data channel clock,SoC GPP_E20
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177,TCP0_DDC_SDA,I/O,TCP0 HDMI display data channel data,SoC GPP_E19
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179,TCP0_DDC_SCL,O,TCP0 HDMI display data channel clock,SoC GPP_E18
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181,GND,,,
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183,DDIB_HPD,I,DDIB hot plug detect,SoC GPP_A18
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185,TCP1_HPD,I,TCP1 hot plug detect,SoC GPP_A20
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187,TCP0_HPD,I,TCP0 hot plug detect,SoC GPP_A19
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189,GND,,,
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191,DDIB_AUX-,I/O,DDIB DP Auxiliary channel,
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193,DDIB_AUX+,I/O,DDIB DP Auxiliary channel,
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195,GND,,,
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197,DDIB_TX3-,O,DDIB DP Lane 3/HDMI TMDS Clock,
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199,DDIB_TX3+,O,DDIB DP Lane 3/HDMI TMDS Clock,
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201,GND,,,
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203,DDIB_TX2-,O,DDIB DP Lane 2/HDMI TMDS Data0,
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205,DDIB_TX2+,O,DDIB DP Lane 2/HDMI TMDS Data0,
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207,GND,,,
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209,DDIB_TX1-,O,DDIB DP Lane 1/HDMI TMDS Data1,
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211,DDIB_TX1+,O,DDIB DP Lane 1/HDMI TMDS Data1,
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213,GND,,,
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215,DDIB_TX0-,O,DDIB DP Lane 0/HDMI TMDS Data2,
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217,DDIB_TX0+,O,DDIB DP Lane 0/HDMI TMDS Data2,
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219,GND,,,
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221,TCP0_AUX-,I/O,TCP0 DP Auxiliary channel,
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223,TCP0_AUX+,I/O,TCP0 DP Auxiliary channel,
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225,GND,,,
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227,TCP0_TXRX1-,O,TCP0 DP Lane 3/HDMI TMDS Clock,
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229,TCP0_TXRX1+,O,TCP0 DP Lane 3/HDMI TMDS Clock,
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231,GND,,,
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233,TCP0_TX1-,O,TCP0 DP Lane 2/HDMI TMDS Data0,
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235,TCP0_TX1+,O,TCP0 DP Lane 2/HDMI TMDS Data0,
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237,GND,,,
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239,TCP0_TXRX0-,O,TCP0 DP Lane 1/HDMI TMDS Data1,
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241,TCP0_TXRX0+,O,TCP0 DP Lane 1/HDMI TMDS Data1,
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243,GND,,,
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245,TCP0_TX0-,O,TCP0 DP Lane 0/HDMI TMDS Data2,
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247,TCP0_TX0+,O,TCP0 DP Lane 0/HDMI TMDS Data2,
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249,GND,,,
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251,VIN,,Main power input 9~20V,
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253,VIN,,Main power input 9~20V,
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255,VIN,,Main power input 9~20V,
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257,VIN,,Main power input 9~20V,
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259,VIN,,Main power input 9~20V,
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