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		(uuid "fdd1eb1b-74cf-4985-a576-d264d5d66544")
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	(text_box "HSIO_0/HSIO_1 used for USB3.0 \n"
		(exclude_from_sim no)
		(at 175.26 82.55 0)
		(size 39.37 10.16)
		(stroke
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		(uuid "0a85e97a-1905-4ec9-bf27-2beddff3bd81")
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	(text_box "HSIO_2 used for M.2 M KEY\n"
		(exclude_from_sim no)
		(at 175.26 96.52 0)
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	(text_box "HSIO_6 used for GbE(PCIe x1)\n"
		(exclude_from_sim no)
		(at 175.26 163.83 0)
		(size 39.37 10.16)
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		(uuid "2f237111-6481-4f8a-8785-4a4511811bac")
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	(text_box "USB2 P3/P4 used for USB2.0 \n"
		(exclude_from_sim no)
		(at 175.26 184.15 0)
		(size 39.37 10.16)
		(stroke
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			(type default)
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		(uuid "3588f79e-12e7-4ef9-8a11-c4f37ca076ff")
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	(text_box "DDI B used for HDMI\n"
		(exclude_from_sim no)
		(at 175.26 219.71 0)
		(size 39.37 10.16)
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	(text_box "HSIO_3 used for M.2 E KEY\n"
		(exclude_from_sim no)
		(at 175.26 107.95 0)
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	(text_box "HSIO_8/9/10/11 used for PCIe x4\n\n"
		(exclude_from_sim no)
		(at 175.26 137.16 0)
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	)
	(text_box "USB2 P1/P2 used for USB3.0\n"
		(exclude_from_sim no)
		(at 175.26 173.99 0)
		(size 39.37 10.16)
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		(uuid "82f395ca-5724-46c5-b423-e0c2b2645fca")
	)
	(text "HSIO functions are defined by the BIOS source code, \nCannot be changed in BIOS settings.\n\nBefore starting design, you should choose one of\nthe available BIOS configurations on:\nhttps://github.com/LattePandaTeam/LattePanda-Mu\nOr contact techsupport for custom your BIOS\n\nThe default functions are defined as follows:\n\n- HSIO0: USB3.2 10Gbps\n- HSIO1: USB3.2 10Gbps\n- HSIO2: PCIe 3.0 x1\n- HSIO3: PCIe 3.0 x1\n\n- HSIO8: PCIe 3.0 x4 (Lane 0)\n- HSIO9: PCIe 3.0 x4 (Lane 1)\n- HSIO10: PCIe 3.0 x4 (Lane 2)\n- HSIO11: PCIe 3.0 x4 (Lane 3)\n\n- HSIO6: PCIe 3.0 x1"
		(exclude_from_sim no)
		(at 50.8 88.9 0)
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		(uuid "079af5f8-10e7-40c4-b602-5968a2ef171e")
	)
	(text "HPD pin of unused DDI/TCP port\nneeds to be pulled down"
		(exclude_from_sim no)
		(at 241.3 246.38 0)
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		(uuid "16ed486c-fd90-4770-a2d8-05235b5893d7")
	)
	(text "Lite Carrier has no second BIOS ROM\n~{BIOS_SEL} pull up to 3.3V to select ROM on LattePanda Mu"
		(exclude_from_sim no)
		(at 387.35 256.54 0)
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		(uuid "2d63faa2-dd28-4684-800a-7cbea9673adf")
	)
	(text "DDI/TCP functions are defined by the BIOS source code, \nCannot be changed in BIOS settings.\n\nBefore starting design, you should choose one of\nthe available BIOS configurations on:\nhttps://github.com/LattePandaTeam/LattePanda-Mu\n\nThe default functions are defined as follows:\n\n- DDIA: eDP 1.4b (the 40Pin connector on the Mu)\n\n- DDIB: HDMI 2.0\n\n- TCP0: HDMI 2.0\n\n- TCP1: USB TypeC (need external PD controller)"
		(exclude_from_sim no)
		(at 50.8 215.9 0)
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		(uuid "31773925-6642-4502-a07e-a6f9ceebe39d")
	)
	(text "Sleeping State Signal\n\n- SLS_S0: \n  - S0 (Working): HIGH\n  - S3 (Slpeeping): LOW\n  - S4 (Hibernation): LOW\n  - S5 (Soft Off): LOW\n- SLS_S3:\n  - S0 (Working): HIGH\n  - S3 (Slpeeping): HIGH\n  - S4 (Hibernation): LOW\n  - S5 (Soft Off): LOW"
		(exclude_from_sim no)
		(at 165.1 50.8 0)
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		(uuid "63c779e4-b629-4099-82bd-b0ff1fb97de6")
	)
	(text "USB2_P6 is reserved for TypeC PD Controller\nDO NOT use it as a normal USB"
		(exclude_from_sim no)
		(at 355.6 123.19 0)
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		(uuid "71906067-8cc6-4edc-ac8a-a821e9f2fbbe")
	)
	(text "SPI is only used to connect to the BIOS ROM and discrete TPM\nCannot be used as a general SPI interface."
		(exclude_from_sim no)
		(at 387.35 245.11 0)
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		(uuid "7ef43269-38c0-4067-b203-907618be0ee9")
	)
	(text "All I2C have integrated pull-up resistors.\nno need to add pull-up resistors"
		(exclude_from_sim no)
		(at 387.35 224.79 0)
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		(uuid "868109ec-c753-4c31-a8ec-6ceb2ab09b0b")
	)
	(text "Debug uart"
		(exclude_from_sim no)
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		(uuid "8c5d3f1b-f5d7-4b5f-a298-b40aaf39ce83")
	)
	(text "~{CLKREQ} is reserved for PCIe ASPM L1s\nUnless the device clearly supports it, pull it down to enhance compatibility"
		(exclude_from_sim no)
		(at 425.45 110.49 0)
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		(uuid "9a4bd068-3697-44c1-86e4-31d228ed38c0")
	)
	(text "HPD pin of unused DDI/TCP port\nneeds to be pulled down"
		(exclude_from_sim no)
		(at 241.3 284.48 0)
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		(uuid "edc56b6d-27b3-4225-bdc9-4cc6e629c57d")
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	(hierarchical_label "DDI_B_DDC_SCL"
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		(uuid "049833a1-6963-4c19-9f32-303a3a1e13a7")
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	(hierarchical_label "HSIO_9_TX-"
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	(hierarchical_label "HSIO_11_RX+"
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	(hierarchical_label "USB_2_P1-"
		(shape bidirectional)
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	(hierarchical_label "USB_2_P2-"
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	(hierarchical_label "HSIO_8_TX-"
		(shape output)
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		(uuid "1a9e4365-b07f-4f4c-8f29-257240088eed")
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	(hierarchical_label "DDI_B_HPD"
		(shape input)
		(at 238.76 208.28 180)
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	(hierarchical_label "REFCLK3+"
		(shape output)
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		(uuid "1d92e0e2-a965-48f1-8233-b5390b97037e")
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	(hierarchical_label "SOC_UART1_TX"
		(shape output)
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		(uuid "1fa5dc41-c067-47c6-86e7-b79ed4707c24")
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	(hierarchical_label "I2C4_SDA"
		(shape bidirectional)
		(at 368.3 226.06 0)
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